PCI core design in FPGA

[Langus Matevz RDHW <langus@iskratel.si>]

I would like to know, whether anone has designed his own PCI interface in
standard FPGA devices to run as master/target - 64bit on 66 MHz. I would
like to know, how much effort does this task require.

Best regards,
  Matevz Langus

Matevz Langus
IskraTEL,  Ljubljanska c. 24a,  SI-4000 Kranj,  Slovenia
Tel : +386 64 27 27 09 , GSM : +386 41 54 82 13 , Fax : +386 64 22 15 52 
Web : wwww.iskratel.si  Mail : langus@iskratel.si