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Re: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards w/PCI 2PCI bridge on it



All:

there's a clear definition of interrupt routing behind a PCI2PCI bridge.
Look at the PCI bridge specification for details.
If you do not comply with this spec the BIOS (Firmware for non x86) will
write the wrong values to the INT Line registers of the devices on the
secondary bus of a bridge. This will cause big problems since the device
drivers use this information for hooking the interrupt service routine to
the right vector.

If you do use a single interrupt behind the bridge, your boards will only
work on platforms which use 1 system interrupt for all PCI Interrupts or
have a special well known interrupt wiring. But these are custom systems in
terms of PCI. (Ok, some PCs only have one IRQ left for PCI, but as ISA
peripherals become unpopular, these systems will disappear).

If you want to distribute  your card as a stnadard board level product, keep
to the spec.

Regards,

Peter Marek
General Director
MarekMicro GmbH
Kropfersrichter Str. 6-8
D-92237 Sulzbach-Rosenberg
Germany
Phone: 049 - 9661 - 908 - 210
Fax:      049 - 9661 - 908 - 100
----- Original Message -----
From: Lange, Michael <lange@dvs.de>
To: Mailing List Recipients <pci-sig-request@znyx.com>
Cc: <pci-sig@znyx.com>
Sent: Thursday, October 14, 1999 8:58 AM
Subject: AW: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards
w/PCI 2PCI bridge on it


>
>
> -----Ursprüngliche Nachricht-----
> Von: Lame Brooks-G14738 [mailto:Brooks_Lame@mcg.mot.com]
> Gesendet am: Wednesday, October 13, 1999 9:47 PM
> An: 'Lange, Michael'
> Cc: 'PCISIGList'
> Betreff: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards
> w/PCI 2PCI bridge on it
>
>
>
> ..snip..
> > The best procedure for device selection is to use device
> > numbers 4,8 and
> > 12 ( = data line 20,24 and 28) only
> > in the case that only 1 IRQ line (INTA) should be shared by
> > all devices
> > behind the bridge.
> > /Michael
>
> Why would you want to do that?  Is it just a personal preference for
> intr
> organization?  I suppose I could see doing that if all your devs behind
> the
> bridge were fixed and owned by one intr service routine.  -- BrooksL
>
> ....
> There are hundreds of PC platforms worldwide which only support 1 IRQ
> line (INTA) per PCI slot.
> In the case that a PCI card with a bridge requests more than 1 IRQ
> signal
> (example : device 0 and 1 are used instead of 0 and 4) you will get
> resource allocation problems
>
> (driver under NT cannot be loaded or something like that).
>
> Of course this is platform dependent. On SPARC-based Solaris computers
> you can do whatever
> you want with the 4 IRQ signals for each slot.
>
> This is our experience we have made during the last 2 years.
>
> /Michael