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RE: Real PCI Clock Rates
Oops, sorry, I was wrong.
Thanks for the correction!
Maybe I was thinking of an earlier revision?
At 04:06 PM 10/22/99 -0400, you wrote:
>>also note that "33MHz" systems can have the clock change
>>dynamically, even stop. My PC bios has an option to
>>enable/disable "spread specturm" PCI clocking. This means
>>you can't use PLL type ("0 nS delay") clock chips to
>>receive the clock. "66MHz" systems have to have a fixed
>>frequency, so this isn't a problem.
>66MHz systems CAN have a "spread spectrum" clock. There are restrictions in
>the (Rev. 2.2) Spec about how quickly that clock can vary, so downstream
>PLLs should be designed to track it.
>(By the way, there is a typo in Table 7-3 of the Rev. 2.2 Spec. Fspread,
>the last item, should range from -1% to 0% ... not 9%.)