Interrupt Pin Assignments

["Gomi, Robin" <r.gomi@neccsd.com>]

Dear PCI Mailing List Members,

I am having an interpretation debate with regards to 
Section 2.2.6 Interupt Pins (Optional) of the PCI 2.2 Local Bus Spec.

In this section, I am interested in the interpretation of the word
"implement" when describing interrupt lines...

  "If a device implements a single INTx# line, it is
   called INTA#; if it implements two lines, there are called
   INTA# and INTB#; and so forth.  For a multi-function device, all
   functions may use the same INTx# line or each may have its own
   maximum of four functions) or any combination thereof...

Does this mean that a multi-function device can have
for example INTA#, INTB# but have its internal functions be
both mapped to INTB#?  

In other words, what are the allowable combinations/mapping
of a two-function device when both functions require an
interrupt?

Case 1 : INTA# : Function 1 and Function 2
Case 2 : INTA# : Function 1 INTB# : Function 2
Case 3 : INTB# : Function 1 and Function 2 (INTA# "implemented but not
used")

I think Cases 1 and 2 are definitely OK under the spec.
I am somewhat shaky on Case 3...

It seems that a certain operating system bails out after 
NOT finding a '1' in the Interrupt Pin Register thinking that there is
no interrupt requirement for that function.  I think that it should
at least continue on to look for '2', '3' or '4' in the Interrupt
Pin Register before making a decision...

Any thoughts?

Robin Gomi
Server Hardware Engineering
NEC Computer Systems Division