RE: Interrupt Pin Assignments

[Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>]

> Section 2.2.6 Interupt Pins (Optional) of the PCI 2.2 Local Bus Spec.
> 
> In this section, I am interested in the interpretation of the word
> "implement" when describing interrupt lines...
> 
>   "If a device implements a single INTx# line, it is
>    called INTA#; if it implements two lines, there are called
>    INTA# and INTB#; and so forth.  For a multi-function device, all
>    functions may use the same INTx# line or each may have its own
>    maximum of four functions) or any combination thereof...
> 
> Does this mean that a multi-function device can have
> for example INTA#, INTB# but have its internal functions be
> both mapped to INTB#?  

The first part of the first scentece in that paragraph indicates not; if
there is only one INTx# pin coming from your PCI device, it must be INTA#.
The PCI spec refers to add-in boards and system boards, and referes to
connections in that context; so, we're not going to debate the
system-on-a-chip what-if's.  I believe "line" in connection contexts refers
to a physical trace/wire/pin.  The second sentence may be confusing when is
states "any combination thereof [lines]"; however, a combination implies two
or more lines, not just one.  So, it seems the intention of the quoted
excerpt is that multi-function devices (not to be confused with bridged
devices) need to start with INTA# and then add the B, C, D (this ordered
method is good for predictable int distribution).  And I suspect the
intention was that they be added in sequence; though, the "any combination
thereof [lines]" confuses that.  

The real wrench statement is the first sentence of paragraph 2 in section
2.2.6: "Any function on a multi-function device can be connected to any of
the INTx# lines."  That negates any intention of requiring multi-function
devices to start with INTA# (and any predictable int distribution).  So, if
you are having problems with a certain plug&play OS (which one?), direct
them to that statement in the spec.
-- BrooksL

> 
> In other words, what are the allowable combinations/mapping
> of a two-function device when both functions require an
> interrupt?
> 
> Case 1 : INTA# : Function 1 and Function 2
> Case 2 : INTA# : Function 1 INTB# : Function 2
> Case 3 : INTB# : Function 1 and Function 2 (INTA# "implemented but not
> used")
> 
> I think Cases 1 and 2 are definitely OK under the spec.
> I am somewhat shaky on Case 3...
> 
> It seems that a certain operating system bails out after 
> NOT finding a '1' in the Interrupt Pin Register thinking that there is
> no interrupt requirement for that function.  I think that it should
> at least continue on to look for '2', '3' or '4' in the Interrupt
> Pin Register before making a decision...
> 
> Any thoughts?
> 
> Robin Gomi
> Server Hardware Engineering
> NEC Computer Systems Division
>