PCI Reset (Revision 2.1 Vs. 2.2 of PCI)

[Phil Cupryk <pcupryk@matrox.com>]

In the Revision 2.1 specification there is no defined time
for the period between the deassertion of reset and that of
the first configuration access.  Revision 2.2 of the PCI
specification now specifies this time as 2^25 clock cycles.

At 33Mhz the time between the first configuration access
after reset should occur 1s or anytime after the deassertion
of the PCI Reset.  (According to the Revision 2.2 of the
specification).

My problem consists of PCI devices that are starting to
support serial I2C eeproms in order to provide Subsystem
Vendor and Device IDs.  If a PCI agent is busy reading
the contents of a serial eeprom after the deassertion of
reset, it is possible that this particular device is not
ready to receive a PCI configuration access until it has
read all the contents of the external EEPROM.

If this is the case, all devices that use a serial EEPROM
to support such features are NOT 2.1 compliant and are
2.2 compliant since 2.2 gives you the required time interval
to get up and running.

Now I understand that supporting subsystem vendor and
device IDs is becoming the wave of the future, but I have
found some industry devices that must read 10, 20, and 2K
bytes prior to be able to receive the first configuration
access.

With PCs Revision 2.1 compliant I don't see too many
problems with the 10 or 20 byte serial EEPROMS since they
probably will have enough time to download prior to first
configuration access.  It is the larger (2K) serial EEPROMs
support that is of concern to me in a PCI 2.1 compliant
based PC.

I like to know how people are dealing with this issue and
if I would expect to have problems in a Revision 2.1 compliant
system if the PCI agent was not ready for a PCI configuration
access only till 1 second after the deassertion of reset?
Also if someone could provide some insight as what the
proportion of 2.1 vs 2.2 compliant systems is?

Thanks in advance,

Phil






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Phil Cupryk                                        Matrox Electronic Systems
Senior Hardware Engineer                           Video Products Group
EMAIL: pcupryk@matrox.com                          1055 St-Regis Blvd.
TEL  : (514) 685-7230 ext: 2789                    Dorval, Quebec
FAX  : (514) 822-6024                              H9P 2T4
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