PCI configuration question

[Raan Kahn <raan@ngcable.com>]

We have a PCI core on our chip that reads configuration data from an 
EEPROM.
During the reading from the EEPROM, the PCI core asserts Abort to any 
master that tryes to access it.

What I am concered about is what happens at the configuration phase from 
the BIOS: the BIOS might receive many aborts before it can configure our 
chip, even more that its retry counter.

What happens if the retry counter expires? Does the BIOS give up on our 
chip?
How are we supposed to avoid this problem?

Raan.