RE: PCI configuration question

[Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>]

> How are we supposed to avoid this problem?

By meeting the PCI Specifications.  You have 2^25 clocks after deassertion
of RESET#.
-- BrooksL

> -----Original Message-----
> From: Raan Kahn [mailto:raan@ngcable.com]
> Sent: Thursday, 16 December, 1999 07:04
> To: Mailing List Recipients
> Subject: PCI configuration question
> 
> 
> We have a PCI core on our chip that reads configuration data from an 
> EEPROM.
> During the reading from the EEPROM, the PCI core asserts Abort to any 
> master that tryes to access it.
> 
> What I am concered about is what happens at the configuration 
> phase from 
> the BIOS: the BIOS might receive many aborts before it can 
> configure our 
> chip, even more that its retry counter.
> 
> What happens if the retry counter expires? Does the BIOS give 
> up on our 
> chip?
> How are we supposed to avoid this problem?
> 
> Raan.
>