PCI-X / PCI Spec Question

[tilmann_wendel@agilent.com]

Hello,  

I have a question concerning the PCI-X specification. Is  
there any upper bound of clocks (or time) until when a  
completer must complete a previously split transaction? How  
long does a requester has to wait until he can signal an  
error? The PCI Spec in section 3.3.3.3.3. mentions that if a  
master has not repeated a request within 2^15 clocks a target  
can discard a delayed transaction. I haven't found anything  
similar in the PCI-X Spec concerning split transactions.  

Thanks in advance,
best regards,  
Tilmann Wendel

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Tilmann Wendel                             
Agilent Technologies Deutschland GmbH  
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