Hello-
In the PCI spec they spec an unloaded characteristic impedance of the bussed signals on an expansion board to be between 60 -100 ohms. When discussing motherboard implementation two no impedance values are mentioned just the following two constraints:
1. The length and signal velocity must allow a full round trip time on the bus within the specified propagation delay of 10 ns.
2. The loaded impedance seen at any device point on the network must be such that a PCI output device (as specified by it's V/I curve) can meet input device specifications with a single reflection of the signal. This includes loads presented by expansion boards.
To assure compliance with #1, simulation would need to be done including the capacitive loading of the expansion boards (and connectors). The second is of concern. The V/I curves included in the spec, I believe, are created based 22 ohm lines (The spec states they are created based on driving 10 equivalent loads then states that the calculations are done with 22 ohm lines?!?!?) is that to say that PCI spec ICs are capable of driving this impedance??
Any help with this question and PCI motherboard layout is much appreciated!!!
Thanks
W. J. Gomes III
Hardware Engineer
ComputerBoards, Inc.
16 Commerce Blvd.
Middleboro, MA 02346
Voice: (508) 946-5100 x279
Fax: (508) 946-9500
email:walter.gomes@computerboards.com