Re: pci compliant devices?

[Arrigo Benedetti <arrigo@vision.caltech.edu>]

Stuart Adams <sja@brightstareng.com> writes:

>  What I don't understand is how FPGA/CPLD's claim
>  both PCI compliance as well as TTL, LVTTL, LVCMOS 
>  compliance. PCI is reflected wave switched with the
>  CLK->Q time (Tval) spec being the time from the 
>  clock edge to Vstep/Vtest.
>  
>  This in contrast to TTL, LVTTL, LVCMOS in which 
>  CLK->Q is the time from the clock edge to the output
>  reaching Voh min or Vol max.
> 
>  For FPGA/CPLD's is seems that you just need to make
>  sure you meet the PCI setup spec since the output
>  driver is not relying on the reflected wave in order
>  to reach Vih min. 
> 
> -- Stuart

The way it works is that FPGA pads can be configured to support
many different signaling standards. Look at the Xilinx web site
(www.xilinx.com) and you will find a lot of information about
this topic.

Best,

-Arrigo