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Re: pci compliant devices?
Stuart Adams wrote:
> > The way it works is that FPGA pads can be configured to support
> > many different signaling standards.
The chips with banks of I/Os (Virtex, Virtex-E and Spartan-II) will
allow other I/O types in the same bank, provided there isn't a conflict
(e.g. HSTL and PCI can't share the same bank).
> This is not true for 9 out of 10 FPGA/CPLD's which claim
> PCI compliance. Most of these have a single output mode
> (3.3 volt) and no clamp diode. In small print there is
> often a disclaimer something like "outputs are PCI
> electrical specification compatible (no internal clamp
Xilinx has the 3.3 V clamp diodes on all devices for which we have
claimed 3.3 V PCI compliance. In the first devices, the XLT family, we
specially bonded out the clamp diodes for the user to attach to 3.3 V.
In subsequent families (XLA, Spartan-XL, Spartan-II, Virtex, and
Virtex-E) we make the clamp diode user programmable. In some cases (XLA,
Spartan-XL) you turn it on for all I/Os. In newer chips it's selectable
on a per I/O basis. Spartan and 4000/E/EX devices never supported 3.3 V
Universal PCI (3.3 V and 5 V PCI) can be done with Spartan-XL, XLA,
Virtex, and Spartan-II devices. To do this you have to load a different
bitstream depending on the PCI bus voltage (Vio). Virtex-E does not
support 5 V PCI.
Xilinx PCI Applications Engineer