Re: FIFO sizes

[Ken Crocker <kcrocker@kcconsulting.com>]

Tom,

Referencing the reply by Terry Duncan, I, too, have seen ~2 ms delays under
WinNT 4.0 for my bus mastering adaptors (in lightly loaded systems, BTW).
If your system *must* not loose data, you'll need to design in some form
hardware handshaking.

Best Regards,

Ken Crocker - Principal Engineer
Ken Crocker Consulting


Tom Verbeure wrote:

> Hello All,
>
> I was wondering whether there are certain rules of thumb regarding the
> sizing of transmit/receive FIFO's for master operations.
> For our current application, we will need an average transfer rate of
> roughly 15 Mbytes/s, but this can arrive in bursts. What is the maximum
> time that we should buffer our data before we will get a grant from the
> PCI arbiter? (On a heavily loaded PC)
> Assuming that this time is 100 us, a buffer of 1500 bytes should be
> sufficient. Let's take 2k byte  to have some more margin. Is this a
> reasonble size that will avoid dropped data?
>
> Thank you,
>
> Tom Verbeure
> Design Engineer
> Alcatel Microelectronics