endians

[Kaare Gärtner <kaare@spacetec.no>]

>From the never-ending Endians Story....:

The PCI bus is little endian, right ?;  how is data shown
on the bus when transferred ? What would it be like if you
have a BE representation ? 
The core question is: Which LINES represents address zero
on a BE or a LE bus ?

Or:  Anybody bother to answer six questions (case below) ? 


--kaare

------
Case:

For simplicity I use a local bus with connected RAMs.

(Here I designate byte lanes, addresses, bus lines and bit
significance as invariants. The only variable is the byte
ordering. For the 32-bit word 0xABCDEF01 the MSB (or Byte
3) is AB and the LSB (or Byte 0) is 01).

A dual endian (big endian/ little endian) system with a 32-
bit wide data bus uses four byte-wide RAMS to store data.
RAM0 connects to byte lane 0 (bus lines 7-0), RAM1 to byte
lane 1 (bus lines 15-8), RAM2 to byte lane 2 (bus lines 23-
16) and RAM3 to byte lane 3 (bus lines 31-24).

Call 
Bus line x = bx 
RAM connected to byte lane x = BLx
Byte x = BYTEx

In BE mode:

a) Store 0x01 (one byte) in address 0x0

Will 0x01 be stored in BL0 ?

b) Store 0xABCDEF01 in address 0x0

Will 0xAB (MSB) now be stored in BL0 and 0x01 (LSB) in BL3?


Change to LE mode

c) Read one byte from address 0x0

Will 0xAB be read ?

d) Store 0xABCDEF01 in address 0x0

Will 0x01 (LSB) now be stored in BL0 and 0xAB (MSB) in BL3?


Change to BE mode

e) Read one byte from address 0x0

Will 0xAB be read ?

------



-------------------------------------------------
Kaare Gärtner,       Phone:       +47 77 66 08 81
Kongsberg Spacetec,  Fax:         +47 77 65 58 59
9292 Tromso,         url:  http://www.spacetec.no
Norway.              email:     kaare@spacetec.no
-------------------------------------------------