Hello Revered PCI-SIG members,
Being a rookie in PCI-X, rather PCI itself, I would like to put forward some basic queries the answers to which I could not find in specifications.
1. Unlike AGP, PCI uses only rising edge of clock for all its operations. Why PCI can't operate on both the edges of clock, what is the limitation factor?
2. PCI-X says that Retry should be avoided, because it is not guaranteed that the cycle will come again, but this constraint is not in Conventional PCI. Why?
3. Some of the terminations in PCI such as disconnect without data, disconnect with data after n data phases have been altogether removed from PCI-X. Why?
4. Tval timings of PCI-X 66 Mhz and PCI-X 133 Mhz are same, i.e 3.8 ns whereas PCI 33 Mhz and 66 Mhz have different Tval ( 11 ns and 6 ns respectively ). Why?
5. If a system is operating at 33 Mhz, it is not guaranteed that clock will be stable at 33 Mhz, whereas once the frequency is 66/133 Mhz as would be in PCI-X, clock frequency will be constant. Why is this constraint with 33 Mhz operation?
Thanks
Prateek Sharma
Design Engineer
ASIC Design
DCM Technologies
New Delhi 110 008
http://www.dcmtech.com
email: prateek.sharma@dcmds.co.in