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MLT effect on Big transfer
Hello all PCI Experts.
I want to design an Embedded Board & transfer to a PCI slave from a PCI
master big Chunk of DATA ~1MB.
What is the MLT (Master Latency Timer) register effect on this transfer?
Dose it mean that the transfer will be broken into several transfers?
If the transfer is broken into several transfers what will happen with
the arbiter if it is fix priority?
Thank you all
Sharon Kleiman- ELTA