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RE: Memory Read Line and Memory Read Multiple
Thanks to everybody who answered my question about
the usage of Memory Read Line and Memory Read Multiple
commands. Now I don't feel so bad about being confused
about this anymore! ;-)
I have to return to a more basic question. Where is
this cache that we are talking about? If there is
no cache in the system between the master using the
MRL or MRM command, and the memory we are reading,
but there are other caches elsewhere, like between
the memory and the CPU that writes the data there,
do we still need to take into account the cacheline
size of that memory-CPU cache?
Best regards,
Jukka Alve
jukka.alve@nokia.com