Re: what happens if 2 INTs occur at same time

["Thomas J. Merritt" <tjm@codegen.com>]

|<><><><><> Original message from =?iso-8859-1?Q?J=FCrgen_Klemt?=  <><><><><>
|Hello PCI group,
|
|first of all many thanks for the tips I got how to forward configurationcycles
|over a bridge. It's fixed now. It wasn't a "software problem", we only had no
|clock on the secondary bus. By the way, if someone uses the i21150 PPB, when
|pulling the msk_in signal high we suppose that the p_clk signal will be also
|high and not active. But they don't. Sometimes they become activity after power
|up.
|
|The thing why I'm writing is in general to ask about interrupthandling in CPCI
|systems. We are not so close to a PCI-PC (interrupt) system, we only use the
|CPCI bus to control several ATM modules. (The real traffic comes over a UTOPIA
|bus.) The Host CPU is a 8240 from Motorola.
|My question:
|If we have more than 4 peripheral CPCI boards on a backplane, therefore two
|board have to share one interruptline. What happens, when both assert the
|interruptline before the interrupt acknowledge cycle comes thru the bus. I
|remember by myself that there is no addressing mechanism whit this cycle. Which
|board drives the vector onto the bus when two or more boards have driven the
|interruptline ? Which spec. give some information about this toppic ?

The first confusion is that an interrupt acknowledge cycle will or needs
to be done after the interrupt line is raised.  The interrupt ack cycle
are primarily for backwards compatability with older PC hardware.  In
these system the 8259 interrupt controler was across the PCI bus and in
order for the processesor interrupt ack cycles to get to the 8259 they
needed to traverse the PCI bus.  The mechanism used is the interrupt
ack. PCI cycle.  The interrupt ack mechanism is only used for getting 
interrupt vectors from an interrupt controller and is NOT used for
getting a vector from an interrupting device.  Your CPCI boards will
not be generating vectors.  See the EPIC section of the 8240 users manual
for the details on 8240 interrupt handling..

If the CPCI interrupt lines will be routed to the 8240 with the 8240
in direct IRQ mode then, if two interrupt sources kick the same line
at the same time the 8240 will vector to just one interrupt service routine.
In that interrupt service routine you will need to check both devices that
are connected on that line for an interrupt condition.  In general 
interrupt handling logic looks like the following.

	void
	handle_IRQ0()
	{
	    struct handler_info *handlers;

	    for (handlers = interrupt_handlers[INTERRUPT_IRQ0]; handlers;
			handlers = handlers->next)
		(*handlers->func)(*handlers->arg);
	}

Then in your interrupt handler you might do something like the following.

	void
	device_interrupt_handler(struct device_info *dev)
	{
	    while (1)
	    {
		int interrupts = dev->regs[DEV_INTERRUPT_STATUS];

		if (!interrupts)
		    return;

		if (interrupts & DEV_INTERRUPT_CONDITION1_BIT)
		    /* handle interrupt condition 1 here */
		else if (interrupts & DEV_INTERRUPT_CONDITION2_BIT)
		    /* handle interrupt condition 2 here */
		else
		    ...
	    }
	}


Thomas J. Merritt
Software Consultant
CodeGen, Inc.
tjm@codegen.com
1-415-834-9111