PCI Power Management Specification

[billyz@us.ibm.com]

I believe that the following question has been asked before, but rather
than rummage through the archives, I'd like to ask:

There are a couple of places in the PCI Power Management Specification that
indicate the maximum current allowed by an enabled device, from the 3.3Vaux
supply.

Does the word 'maximum' imply rms or peak?  If it is meant to imply peak,
then how is this measured?  There are no test guidelines and it would be
necessary to specify the source impedance of the 3.3Vaux power supply in
order to "verify" a design.

I would think that the PCI Power Management Specification should qualify
the word maximum with either RMS or Peak and if the latter, provide a test
guideline.   Comments anyone??

Thanks,
Bill Zevin
IBM Microelectronics Division