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RE: Address Map question



Mike, re-read the sentence that confused you and note where it says
"re-enabling decode".  When a PCI device first comes out of reset, it is
disabled.  If you are re-enabling it, then presumably the BAR was previously
configured and enabled with a valid value by some other code.  -- BrooksL

> -----Original Message-----
> From: fmnemeth@collins.rockwell.com
> [mailto:fmnemeth@collins.rockwell.com]
> Sent: Wednesday, 10 May, 2000 10:00
> To: pci-sig@znyx.com
> Subject: Address Map question
> 
> 
> Perhaps someone out there can clear up some confusion on this end
> concerning Configuration. As i understand it, the following steps are
> followed to configure a PCI Target:
>      1) The Host reads BAR0 (actually, all of them, but for 
> this example
> i'll limit it to BAR0),
>      2) the Host writes all $Fs to BAR0,
>      3) the Host reads BAR0 to determine the size of BAR0, and
>      4) the Host assigns the address offset to BAR0 & writes it.
>      5) the Host moves on....
> 
> Now, when i read the box at the top of page 204 in the PCI 
> spec v2.2, it
> talks about "Sizing a 32 bit Base Address Register Example." 
> In the first
> paragraph in that box, it describes Steps 1-3 as i described 
> above, but for
> my Step 4, it says "The original value in the Base Address register is
> restored before re-enabling decode in the command register of 
> the device."
> The part i fail to understand is restoring an old value into 
> the BAR. I
> always thought the Host assigned the PCI memory map, but the 
> text in this
> box seems to say the the Targets assign their own spaces in 
> the memory map,
> since the values in the BARs are restored and not assigned 
> from the Host.
> 
> Can anybody shed some light on this for me, please?
> 
> mike nemeth
> Rockwell Collins, Inc.
> fmnemeth@collins.rockwell.com
> 
>