Dear all PCI members,
One question regarding the slew rate of PCI 33Mhz signal.
One of our systems fail PCI bus test.
After measurement, we find that the PCI signals has slow slew rate. The PCI spec. require the slew rate is within 1v/ns to 4v/ns at 0.2Vcc - 0.6Vcc load. The PCI signals we have has 0.8v/ns.
However, the setup time and hold time do meet PCI spec, 7ns and 0ns respectively.
My question is why the slow slew rate will cause the failure. Why PCI spec. need to limit the
slew rate? Isn't the requirement of setup time, hold time and signal quality enough?
Thank you for your helps in advance.
Best regards,
John Lin
SI Engineer
Quanta Computer Inc.,Taiwan, R.O.C.
Email: John@quantatw.com
Tel: 886+3+3979000 ext. 5183