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RE: Split Completion Issue



Hi!!  Amith,

     Iam requesting for 4k address space as I have to support 4k different
addresses. But the device connected to this BAR can supply
only 8bytes for any request to it. 
   Also, I dont expect to recieve a request to this BAR with more that
8bytes all
the times. But because of some error condition if I receive a request to
this
BAR with more than 8 bytes, I am trying to terminate it properly.

Thanks,

- SriKiran Dravida
  Asic Design Engineer
  American Megatrends, Inc.
  srikirand@ami.com
  voice 770 246 8600 x7110
	   ----------
> From: 	Amit Shah[SMTP:Amit@dcmtech.com]
> Reply To: 	Amit@dcmtech.com
> Sent: 	Tuesday, June 13, 2000 11:10 AM
> To: 	'pci-sig@znyx.com'; Srikiran Dravida
> Subject: 	Re: Split Completion Issue
> 
> Hi Srikiran,
> 
> >My Question :
> >
> >     When I transfer the 8 bytes with Split Completion cycle, can I set
> >the BCM bit and change the bytecount to 8 bytes even though it is
> >not to disconnect the transaction on the first ADB ??
> >The PCI-X specification Ver1.0 has not specified the completer for a
> >Split Completion cycle setting the BCM bit for bytecount overflow case.
> >It specifies for disconnection on the first ADB only.
> >  
> 
> No, You cannot set the byte count to 8 and try to disconnect at a non ADB
> aligned address.
> 
> But with your particular case, you have two options.
> 1.  Generate a Device specific error or byte count out of range
> completion, so that the initiator knows that his attempt is no good.
> 2.  Return first 8 dwords as they are, and return the others till ADB as
> all zero's or FF's and disconnect at ADB. (This means that you have a ADB
> of memory with first 8 dwords as active and all other implementated as
> dead or zero's).
> 
> Also can you tell me that why is that in a PCI-X envoirnment, you are
> requesting 4K of space for 8 DWORDS. You can ask only one ADB of space
> as that is the min. requirement for PCI-X for BAR allocation.
> 
> Is it possible that the initiator accessing your device does not know that
> you are just a 8 Dword device ?? Not anybody and everybody will try to
> access your device.
> 
> Amit Shah
> DCM Technologies
> Austin Design Center
> 
> 
> ---------- Original Message ----------------------------------
> From: Srikiran Dravida <SrikiranD@ami.com>
> Date: Mon, 12 Jun 2000 12:13:09 -0400
> 
> >Hi  All,
> >
> >       I have a BAR which requests for 4k address space. But the device
> >connected to this BAR can handle only 8bytes read or 8 bytes write.
> >   In the case of write I do a Single Dataphase Disconnect and forward
> the
> >cycle to the device.
> >   In the case of a read I signal a Split Response, but I have no way of
> >informing
> >the initiator that I can handle only 8bytes of data and no more.
> > So if an initiator issues a read request with more than 8 bytes, say it
> >asked for 16bytes at a 64-bit aligned address, I respond with Split
> >Response. In the
> >Split Completion cycle I transfer 8 bytes (fetched from the device) only.
> I
> >do this
> >by setting BCM bit and changing the bytecount field to 8 bytes in the
> >attribute phase of the Split Completion cycle. For the remaining
> bytecount
> >I do a Split Completion Message cycle with the overflow information.
> >
> >My Question :
> >
> >     When I transfer the 8 bytes with Split Completion cycle, can I set
> >the BCM bit and change the bytecount to 8 bytes even though it is
> >not to disconnect the transaction on the first ADB ??
> >The PCI-X specification Ver1.0 has not specified the completer for a
> >Split Completion cycle setting the BCM bit for bytecount overflow case.
> >It specifies for disconnection on the first ADB only.
> >  
> >  Thanks
> >
> >- SriKiran Dravida.
> >
> >
>