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Re: wait states



In message <000001bfd659$c4b51b60$8852d1d8@dan>, daniel.deconinck@sympatico.ca 
writes:
>In a wintel PCI enviroment, I uderstand that writes or read are not =
>burst. Which is it ?

reads

In order to burst reads, the host bridge would need to fetch beyond 
a requested word.  This would cause problems on hardware where reading
had side effects, like popping a word off a FIFO and then loosing it when
it was not immediately used.