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Re: PCI CLKS disabled relating to FPGA controllers ??

Hi,
 
PCI2.2. defines a time from the rising edge of reset to the first PCI access to a device. This time should be sufficient for most FPGAs to configure (don't know about that million gate beasts).
 
In practice, 95% of all PCI systems out there are just PCI2.1 compliant which means there's no such time. That's why SRAM based FPGA designs may fail in reality. Moreover, I think 100% of Embedded Systems are just PCI2.1 compliant and are intended to boot as fast as possible. I won't recommend using SRAM based FPGAs for such systems.
 
regards,
 
 
Peter Marek
General Director
MarekMicro GmbH
Kropfersrichter Str. 6-8
D-92237 Sulzbach-Rosenberg
Germany
Phone: 049 - 9661 - 908 - 210
Fax:      049 - 9661 - 908 - 100
----- Original Message -----
From: Daniel DeConinck
To: pci-sig@znyx.com
Sent: Thursday, June 29, 2000 3:21 PM
Subject: PCI CLKS disabled relating to FPGA controllers ??

Hello,
 
Regarding: PCI CLKs turning off in unused slots.
 
Can a PC incorrectly judge a slot to be unoccupied if that slot contains a FPGA controller which needs some time to configure ? OR do PCs always only use the 'card present' signal to determine if a slot is occupied.
 
Sincerely
Dan DeConinck