RE: MLT value and PCI2PCI bridge

[Lame Brooks-G14738 <brooks.lame@motorola.com>]

Off the top of my head, I would suggest that if there are no devices behind
the bridge, it should be disabled (all BARs set to zero and disabled in
command reg) and then the MLT.exe check program should give it a passing
mark.
-- BrooksL

> -----Original Message-----
> From: Peter.Heumann@Abg1.SIEMENS.DE
> [mailto:Peter.Heumann@Abg1.SIEMENS.DE]
> Sent: Thursday, 27 July, 2000 03:55
> To: pci-sig@znyx.com
> Subject: MLT value and PCI2PCI bridge
> 
> 
> Dear PCI professionals,
> 2 days ago I posted a question to this mailing list (see 
> below) but did not get any responses so far. May by I 
> addressed this question to the wrong place or the wrong way - 
> so I apologize for that. But if not any response would be 
> highly appreciated.
> Here again my question:
> 
> Tweaking the BIOS of a PC platform with all PCI slots lying 
> behind a bridge (INTEL ICH2 has this kind of "layout") a 
> question came up regarding how to implement the Master 
> Latency Timer value of the bridge device itself:
> Right now the situation is the following: if there is a PCI 
> device existent behind the bridge (a card is plugged) then 
> the MLT of the bridge is calculated according to the latency 
> of that device(s) behind and is set to a value unequal 0. The 
> MLT.EXE tool from PCI Sig's test suite reports no error then.
> But if there is no device behind the bridge (slots left 
> empty) then the MLT of the bridge itself is set to 0. That 
> doesn't seem to be unlogical because there is simply no 
> master device there. But the MLT.EXE reports an error ("MLT 
> is writeable but set to 0") for that very bridge device.
> What is the correct implementation in this case for the 
> bridge's MLT? Set to which value (16 perhaps)?
> 
> May be I oversaw something in the Bridge spec. But your help 
> would be highly appreciated anyway.
> 
> RGDS
> -
> Peter Heumann
> -----------------------------------------------------
> Fujitsu Siemens Computers GmbH
> RD ST 2
> mailto:peter.heumann@fujitsu-siemens.com
> -----------------------------------------------------
>