Re: C/BE[3:0] - PCI traget implementation

[Marco Brambilla <marco-tpa.brambilla@st.com>]

Hi Daniel,

>  On a new FRAME I latch the command nibble. I only decode the three
> LSbits. I ignore C/BE3#. I felt that this would be acceptable since
> only these two commands would be executed at the address where my
> board is located. (DC00 in the bottom one meg) I am wondering if this
> can get me into some unforseen trouble ?

The spec says that if your device doesn't use the enhanced memory
commands (1100, 1110, 1111) it must alias them to MemRead and MemWrite.
That is to say that you must answer to them and answer as you received
one of the commands you're using.

In any case this cannot (I think) explain the behaviour you're seeing,
as long as the other masters are not trying to access you.

What do you mean when you say the card crashes ? All the PCI freezes or
just your card ?
Which PCI core are you using ?

Ciao, Marco.

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