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Re: Memory Write and Invalidate
I'm interested in the MWI question as well.
For MRL/MRM there is a decided advantage to using it, especially on the
64/66 PCI busses on new motherboards. I have seen a difference of about
50% bandwidth useable on PCI when reading host SDRAM.
On Fri, 11 Aug 2000, Duane Clark wrote:
> Howdy,
>
> I was interested in any experience or info folks have with using memory
> write and invalidate in a bus mastering add-in card. Has anyone found
> that implementing this confers a performance advantage over normal write
> transactions in common real world platforms (X86)? How about high end
> platforms? Similarly, how about the memory read multiple and line
> commands?
>
-- Neal Palmer
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