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Re: target burst accesses - resending
Vijay Chougule wrote:
> I am designing a 64-bit PCI target card. The card's internal register space
> and the data space are memory mapped. The only agent that does target accesses
> to the card is the host processor. I am trying not to support burst target
> read or write accesses to the card from the host processor. Since the card is
> memory mapped, I do not know whether there can be burst accesses to the card
> even if the software always accesses one word (32 bit at a time). In other
> words does the MIOC on the host system, convert the single word accesses (to
> consecutive locations) into burst accesses for any reasons ?
> Is it a good idea to support only single word target accesses ? Would I need
> to do target disconnect after each word or the host processor will end the
> transaction after the first word ?
As long as you are not doing a large number of single word accesses,
which would affect the performance of other parts of the system, then I
don't see a problem with only allowing single word accesses. But in that
case, I also don't see why you would not want to always assert STOP
along with TRDY, and hold STOP until the end of the transaction. The
extra logic is very small and simple, and allows you to always meet the
spec. I think the slight additional effort will pay off in the long run,
in peace of mind at the very least.
> Thank you in advance,
> P.S. Sorry for the wrong subject earlier.
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