Re: target burst accesses - resending

["Monish Shah" <monishs_in@yahoo.com>]

Hello Vijay,

I see something contradictory here.  You are designing a 64 bit card but
you don't want to support burst accesses.  As Duane Clark's reply noted, it
is OK to not support burst accesses as long as you don't have too many
accesses.  (I.e., performance requirements are not high.)

But, if performance requirements are not high, why is the card 64 bit?
This is the contradiction.

Anyway, technically you are free to not support bursts as explained by
Duane, even on a 64 bit card.

Monish

----- Original Message -----
From: Vijay Chougule <vchougule@altavista.com>
To: <pci-sig@znyx.com>
Sent: Tuesday, August 15, 2000 4:45 AM
Subject: target burst accesses - resending


> Hi,
>
> I am designing a 64-bit PCI target card. The card's internal register
space and the data space are memory mapped. The only agent that does target
accesses to the card is the host processor. I am trying not to support
burst target read or write accesses to the card from the host processor.
Since the card is memory mapped, I do not know whether there can be burst
accesses to the card even if the software always accesses one word (32 bit
at a time). In other words does the MIOC on the host system, convert the
single word accesses (to consecutive locations) into burst accesses for any
reasons ?
>
> Is it a good idea to support only single word target accesses ? Would I
need to do target disconnect after each word or the host processor will end
the transaction after the first word ?
>
> Thank you in advance,
>
> Vijay
>
> P.S. Sorry for the wrong subject earlier.
>
>
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