Fw: target burst accesses - resending

["Weng Tianxiang" <wtx@umem.com>]

Hi,
I don't see any contradictory here.

His requirements are very clear:
1. The target card will be accessed by one 32-bit word a time;
2. To make design as simple as possible that may lead to a non-FPGA chip
economical solution and doesn't violate any PCI rules.

To achieve this target, the best way I think is:
1. Design a 32-bit PCI target card, not 64-bit PCI target card. Any 32-bit
cards are compatible with 64-bit PCI bus.
2. When being accessed first word, if it's the last transaction (nFrame is
high), it's a normal end of transaction, don't do anything. If not the last
one(nFrame is still low), then do disconnect operation.

No any performance penalty will be noticeable. And PCI bus can adapt to the
situation very well.

Weng Tianxiang
Micro Memory Inc.
9540 Vassar Av.
Chatsworth, CA 91311
Phone: 818-998-0070, Fax: 818998-4459

>
> ----- Original Message -----
> From: Monish Shah <monishs_in@yahoo.com>
> To: <pci-sig@znyx.com>; Vijay Chougule <vchougule@altavista.com>
> Sent: Tuesday, August 15, 2000 2:57 AM
> Subject: Re: target burst accesses - resending
>
>
> > Hello Vijay,
> >
> > I see something contradictory here.  You are designing a 64 bit card but
> > you don't want to support burst accesses.  As Duane Clark's reply noted,
> it
> > is OK to not support burst accesses as long as you don't have too many
> > accesses.  (I.e., performance requirements are not high.)
> >
> > But, if performance requirements are not high, why is the card 64 bit?
> > This is the contradiction.
> >
> > Anyway, technically you are free to not support bursts as explained by
> > Duane, even on a 64 bit card.
> >
> > Monish
> >
> > ----- Original Message -----
> > From: Vijay Chougule <vchougule@altavista.com>
> > To: <pci-sig@znyx.com>
> > Sent: Tuesday, August 15, 2000 4:45 AM
> > Subject: target burst accesses - resending
> >
> >
> > > Hi,
> > >
> > > I am designing a 64-bit PCI target card. The card's internal register
> > space and the data space are memory mapped. The only agent that does
> target
> > accesses to the card is the host processor. I am trying not to support
> > burst target read or write accesses to the card from the host processor.
> > Since the card is memory mapped, I do not know whether there can be
burst
> > accesses to the card even if the software always accesses one word (32
bit
> > at a time). In other words does the MIOC on the host system, convert the
> > single word accesses (to consecutive locations) into burst accesses for
> any
> > reasons ?
> > >
> > > Is it a good idea to support only single word target accesses ? Would
I
> > need to do target disconnect after each word or the host processor will
> end
> > the transaction after the first word ?
> > >
> > > Thank you in advance,
> > >
> > > Vijay
> > >
> > > P.S. Sorry for the wrong subject earlier.
> > >
> > >
> > >
_______________________________________________________________________
> > >
> > > Free Unlimited Internet Access! Try it now!
> > > http://www.zdnet.com/downloads/altavista/index.html
> > >
> > >
_______________________________________________________________________
> > >
> > >
> >
> >
> >
>