RE: looking for Parity signal status

[Richard Walter <rwalter@Brocade.COM>]

>From PCI 2.2, section 2.2.2, page 30, under PAR, sentence 3:

"For data phases, PAR is stable and valid one clock after either IRDY# is asserted on a write transation or TRDY# is asserted on a read transaction.  Once PAR is valid, it remains valid until one clock after the completion of the current data phase."

So, under conditions i, ii, & iii in your question, PAR is not valid on the next clock.  So, you should drive PAR to some level, but it does not need to be valid because someone inserted a wait state.

A related issue is the changing of byte enables during a burst.  From PCI 2.2, section 3.2.3, page 58, paragraph 3, sentence 2:

"The byte enables are free to change between data phases but must be valid on the clock that starts each data phase and must stay valid for the entire data phase. <snip> Note: Byte enables are valid during the entire data phase independent of the state of IRDY#"

What this means is that during reads, the initiator must drive C/BE# to the next pattern when IRDY# & TRDY# are active, even if it intends to stall data transfers by driving IRDY# high at the same time.  Put another way, an initiator cannot drive IRDY# high with the intent of using this time to figure out which byte enables he wants to assert and then change the BE's and then drive IRDY# low to get that data.

-Richard Walter
Hardware Engineer
rwalter@brocade.com
Note: I speak for myself, not for Brocade.

-----Original Message-----
From: nimit.endlay@st.com [mailto:nimit.endlay@st.com]
Sent: Monday, August 21, 2000 10:29 PM
To: pci-sig@znyx.com
Subject: looking for Parity signal status


I am working on the Parity Block of a PCI COre.

I am facing problem in deciding what should be the status of PAR,ie, 

a)last parity should continue ,or
b)the PAR signal shoul be tristated, or 
c)a new parity be generated 

when C/BE has changed but the old Data continues due to wait state
inserted by 
i)the initiator during a write transaction ,or
ii)by the target during a read transaction ,or
iii)by both at the same time

Thanks,
Nimit