RE: Is it a PCI specs violation that ...

[Richard Walter <rwalter@Brocade.COM>]

Weng,

Yes, that is a violation of the PCI spec.  While it is true that a burst only gives the address at the beginning and other devices will not "jump in" in the middle, the problem is that unless you have designed and control over both ends you can't guarantee that the burst won't be broken up.  Then, when the burst is continued, the master will begin that transaction with the address which it left off from.  If this is outside of your address assignment, then your commands will be targeted to some other device.  That would be bad.

-Richard Walter
Hardware Engineer
rwalter@brocade.com
Note: I speak for myself, not for Brocade.


-----Original Message-----
From: Weng Tianxiang [mailto:wtx@umem.com]
Sent: Monday, August 28, 2000 10:51 AM
To: pci-sig@znyx.com
Subject: Is it a PCI specs violation that ...


Hi,
I am designing a system located on PCI Bus 0 and designed a data and command mixed transfer mechanism as follows, I want to confirm whether or not my such practice is a violation of PCI specs:

In device PCI configuration, I use a Base Address Register and apply for 1KBytes for command and status use only.

Now I design a command that has a command head and data part. The data part is far beyond the 1KBytes. When handling the situation, I know where the data part starts and will transfer its data part into internal memory. But from PCI Bus point of view, its final address is far beyond the 1KBytes space, and possibly it steps into other device memory space.

Becasue PCI transaction is recognized only at its address cycle, so I think if the first address falls into my memory space, others will ignore any amount of data transferred.
 
Thank you.

Weng