pci-x query

["Madhura Bokil" <madhura@controlnet.co.in>]

Hello,

  I have some queries regarding PCI-X.

 

    1] This is regarding the PCI-X status register. [Pg. 141 from PCI-X Addendum Rev. 1.0]

 

        Bits 15-8 [Bus Number] & 7-3 [Device Number] are mentioned as Read-only bits in the standard. At the same time it is mentioned that these bits should be updated

        during each Configuration Write Transaction. If these bits are to be updated during every Configuration Write transaction, how these bits can be read-only?

 

    2] This is regarding the split response during DWORD transactions. 

 

        I am not getting the significance of the Split Response for DWORD transaction. If it is a DWORD transaction, why it is necessary to give split response instead of

        completing the transaction? 

 

I will be thankful if somebody can help me to clear these queries.

 

Regards,

 

Madhura Bokil.