[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: pci-x query





Hi Madhura,

1) The bits are listed as read only because you can't write them directly,
i.e. by writing bit bits 7:3 of the PCI-X status register.  They are
updated only indirectly.

2) Split response is appropriate for DWORD transactions for the same reason
its used for burst transactions -- when the data is not available
immediately or the write cannot complete immediately.

Rich Iachetta
IBM Microelectronics Division -- Austin
World Wide Field Design Center
Phone: 512-838-6305   Tie Line: 678-6305


"Madhura Bokil" <madhura@controlnet.co.in> on 08/29/2000 08:36:03 AM

To:   <pci-sig@znyx.com>
cc:
Subject:  pci-x query




Hello,
  I have some queries regarding PCI-X.

    1] This is regarding the PCI-X status  register. [Pg. 141 from PCI-X
Addendum Rev. 1.0]

        Bits 15-8 [Bus  Number] & 7-3 [Device Number] are mentioned as
Read-only bits in  the standard. At the same time it is mentioned that
these bits should be updated
        during each  Configuration Write Transaction. If these bits are to
be updated during every  Configuration Write transaction, how these bits
can be read-only?

    2] This is regarding the split  response during DWORD transactions.

        I am not getting  the significance of the Split Response for DWORD
transaction. If it is a  DWORD transaction, why it is necessary to give
split response instead of
        completing the  transaction?

I will be thankful if somebody can help me to clear these  queries.

Regards,

Madhura Bokil.