Re: Question about the initialization of configuration registers

["Stefan Spaeth, tel. +49 711.821.43051, fax 45571" <S.Spaeth@alcatel.de>]

"" wrote:
> 
> Hi, everyone!
> 
> I have some questions. I'm going to design a PCI master/target device chip according to PCI Spec. rev. 2.2. Because this chip can be used in many PCI application cards, I think subsystem vendor ID and subsystem ID must be changeable by system vendors and these IDs will be used to identify the system card in PC Windows system. Therefore, many chips use an EEPROM to put them in it. But I'd like to implement a PCI device without an EEPROM. Using the boot-ROM program in the application side(not PCI side), we can assign the initial values of these configuration registers whenever system reset (PCI bus reset) is released.
> 
> 1) Any problem in this method?

This depends on where your boot-ROM is executed. If it is executed by a 
processor residing on the PCI card, then I think it is ok. If you expect
this boot-ROM to be executed as a PCI expansion ROM then I think it is 
not compliant.
Once you are ready to answer PCI configuration accesses on your device,
the device must be fully operational with all configuration registers
in place. This is why the PCI bus access to a device is blocked until
a configuration EEPROM has finished loading (see PCI Spec 2.2 
implementation note on Trhfa on page 135). Thus at the time the expansion
ROM is executed you must already have valid configuration register entries.

If you know that an Expansion ROM exists, you could, of course, have your
device read the subsystem information from that ROM prior to boot-ROM 
execution (if the data is put somewhere where it doesn't collide with other
expected 
data structures). Your PCI device is actually controlling
the direct path to the Expansion ROM. And while reading the
values from the boot-ROM you simply won't accept PCI configuration accesses 
(the PCI cores we use are just giving retry until they are ready).

> 2) I know that PC Windows system can't identify the PCI card using this chip until PCI configuration registers are set. But I don't know how much time is between PCI bus reset and the BIOS startup(as BIOS startup = start time of PCI device identification ). Please let me know the time sequence among BIOS startup time, PCI bus reset, and CPU reset. I think CPU reset and PCI reset will be released at the same time, and then BIOS startup. Right? And can you tell me the interval among the events?

I guess it is again Trhfa you are looking for. 
(see page 128 and 135 in PCI spec 2.2).

> 3) Assuming that these IDs are hardwired with the specific values, how PC Windows system do a process the PCI cards using the same IDs? And I wonder how the PCI card using this chip can be identified without these IDs. Nothing?

PCI doesn't care. You can have as many identical cards in your system as
you like. Whether your operating system is able to handle it, is a
different story. Ethernet cards, for example, use their station address
to be uniquely identified by the operating system. The drivers that are
associated with a certain card/device/function have to know or find out
how to proceed with identical cards. This may be simple (e.g. network
card <-> network interface), or more difficult (e.g. for multiple graphics 
adapters where you have to cope with VGA compatibility, 
primary display, scondary displays, etc.).


> I could't find this contents in mail box of PCISIG homepage and documentations.
> Thanks in advance.
> 

-- 
      _/        ALCATEL AG           Stefan Spaeth
     _/_/       Stuttgart            ASIC Design
    _/  _/            
   _/    _/     Microelectronics     Dept.: VS/EHD
  _/      _/    Center               Tel. : +49 711 821-43051
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_/_/_/_/_/_/_/  D-70435 Stuttgart    Email: S.Spaeth@alcatel.de