RE: PCI Burst Length Limit

[Lame Brooks-G14738 <brooks.lame@motorola.com>]

If I recall correctly, with the Intel Pentium (n) architecture, its cache
line size is 4 Qwords, so, without an 'intelligent' host bridge, you will be
limited to bursts of 8 Dwords on the 32bit PCI bus.  -- BrooksL

> -----Original Message-----
> From: olivier.stehlin@wifag.ch [mailto:olivier.stehlin@wifag.ch]
> Sent: Thursday, 07 September, 2000 06:05
> To: pci-sig@znyx.com
> Subject: PCI Burst Length Limit
> 
> 
> Hi
> 
> I am doing tests with a prototyping board for the AMCC S5933. 
> When doing
> PCI-master-writes (PC -> add-on-card), I noticed that burst 
> length is never
> greater than 8 clocks. I have checked the latency timer, the 
> PC-program has
> always enough data (same buffer in a loop), the add-on-card reads data
> synchronous with the PCI-clock.
> 
> What can I do to increase the burst length ?
> 
> 
> My configuration:
> Dell Optiplex GX1
> Pentium II, 350 MHz, 440BX
> Phoenix BIOS 07/27/98
> WinNT4.0, SP4
> 
> 
> O. Stehlin
> 
> mailto:olivier.stehlin@wifag.ch
>