Re: PCI Burst Length Limit

["Sushil S.Kamerkar SO/C" <kamerkar@magnum.barc.ernet.in>]

On Thu, 7 Sep 2000 olivier.stehlin@wifag.ch wrote:


> 
> I am doing tests with a prototyping board for the AMCC S5933. When doing
> PCI-master-writes (PC -> add-on-card), I noticed that burst length is never
> greater than 8 clocks. I have checked the latency timer, the PC-program has
> always enough data (same buffer in a loop), the add-on-card reads data
> synchronous with the PCI-clock.


If everything else is all right, the burst of 8 can be related to 8 DWORD 
FIFO depth of AMCC S5933. I think your add on logic is not fast enough to
empty the FIFO quickly or something like that?

> 
> What can I do to increase the burst length ?
> 
> 
> My configuration:
> Dell Optiplex GX1
> Pentium II, 350 MHz, 440BX
> Phoenix BIOS 07/27/98
> WinNT4.0, SP4
> 
> 
> O. Stehlin
> 
> mailto:olivier.stehlin@wifag.ch
>