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Re: Byte Wide Devices on PCI Bus




To:   "'pci-sig@znyx.com'" <pci-sig@znyx.com>
cc:
Subject:  Byte Wide Devices on PCI Bus


>I'm looking into designing an embedded motherboard using FPGAs with a PCI
>Core.   On the backend of the FPGA there will be some byte-wide memory
>devices (i.e., flash, ram) organized as x8 not x32.   Since PCI memory
space
>is DWORD aligned, will there be any issues addressing byte-wide devices
>(i.e., x8 Flash) over the PCI bus?
>
>I was assuming the FPGA design could encode the byte enables  "C/BE(3:0)"
>into the 2 LSB address bits required by the byte-wide memory devices.
Again
>the memory devices are organized as x8 not x32.   Is this assumption
>correct?

Sounds good if you are sure all accesses coming from PCI will be one byte
accesses.  What do you plan to do if the access has more than one byte
enable active?

Rich Iachetta
IBM Microelectronics Division -- Austin
World Wide Field Design Center
Phone: 512-838-6305   Tie Line: 678-6305