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Re: Is is possible to receive a cheep SubVendorID?
Michael Mazlin wrote:
> Also I like Patrick's "funny" Vendors IDs, but
> I would like to see less "ONEs" in Vendor ID from the practical
> point of view: In XILINX or ORCA (Lucent) FPGAs this "ONEs"
> take a lot of resources, specially for output multiplexer, that makes
> meeting 11ns timing a little more difficult.
> And simple number is easy to remember.
> I would go with Patrick's
> " "600d", which gives the right impression about your
> quality if you squint hard enough (good)."
For Xilinx PCI cores implemented in Virtex devices, it makes no
difference if you set the bits to one or zero in terms of resource
utilization. In both cases, it's an efficient implementation that use no
LUTs or FFs. The main variation in device utilization depends on the
number of BARs and the size of address space they decode. You save some
space by disabling unused BARs and setting the address space larger.
The Xilinx PCI core doesn't use an output multiplexer. The CE pin on the
AD and CBE FFs is controlled from IRDY# and TRDY# with 3 ns of setup so
we were able to forgo this multiplexer. Virtex devices have a fast clock
(relative to Xilinx 4000 series FPGAs) so meeting the 11 ns (or 6ns at
66 MHz) clock to out spec is not a problem.
Jim McManus
Xilinx PCI-X Applications Engineer