Re: Real-world disconnects

[Marco Brambilla <marco-tpa.brambilla@st.com>]

Hi Pat,

> For MWI, the controller must transfer entire cachelines,
> according to the spec.  It is not allowed to stop on
> a partial transfer.

Except if it is a (poor) controller which does not really implement MWI
and aliases it to "standard" mem write.
So the question would be:
Are really there poor chipsets which do not implement MWI but rather
alias it to MW (as per the PCI spec) ?

Ciao, Marco.
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