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Re: Master Abort.
Chris,
You maybe seeing a function described in the last sentence of the 2115x
spec snippet attached.
21152 PCI-to-PCI Bridge Preliminary Datasheet 4-13
PCI Bus Operation
4.6.5 Delayed Read Completion with Target
When the delayed read request reaches the head of the delayed transaction
queue, and all
previously queued posted write transactions have been delivered, the 21152
arbitrates for the target
bus and initiates the read transaction, using the exact read address and
read command captured
from the initiator during the initial delayed read request. If the read
transaction is a nonprefetchable
read, the 21152 drives the captured byte enable bits during the next cycle.
If the transaction is a
prefetchable read transaction, it drives all byte enable bits to 0 for all
data phases. If the 21152
receives a target retry in response to the read transaction on the target
bus, it continues to repeat the
read transaction until at least one data transfer is completed, or until an
error condition is
encountered. *** If the transaction is terminated via normal master
termination or target disconnect
after at least one data transfer has been completed, the 21152 does not
initiate any further attempts
to read more data. ***
Regards, Gaines
IBM IntelliStation Development
Tel 919 254-9322, T/L 444-9322, Fax 919 254-2629 internet: gaines @
us.ibm.com
Christophe.LINDHEIMER@tcc.thomson-csf.com on 11/02/2000 12:08:08 PM
To: pci-sig@znyx.com
cc:
Subject: Master Abort.
Hi .
I am using a card with a MPC860 connected with a Qspan that is connected
with a 21554.
When I try to do a DMA access to a memory on a card behind the 21554 it
doesn't work and
the Qspan tells me he has done a Master Abort.
What's happening ?
What is the signification of a master abort ?
In wich bus is the problem ( bus MPC860, local PCI bus on Qspan, PCI bus
behind 21554 ) ?
Thanks
Chris