Re: Merging of two 32-bits to form one 64-bit data

[mcr@solidum.com]

>>>>> "Ajit" == Ajit Khaparde <akhaparde@platysindia.com> writes:
    Ajit> I have come across a situation during the design of a 66MHz 64-bit
    Ajit> PCi-to-PCI Bridge and it goes this way.... 

    Ajit> The Initiator on the Primary/originating bus could be a 32-bit
    Ajit> master and the Target on the Secondary/Destination bus could be a 64-bit
    Ajit> device. Then is it possible to latch the data from the initiator as it is
    Ajit> being sent(32-bit) and merge two such 32-bits of data into one to form
    Ajit> one 64-bit of data and send it to the target, for it can accept a 64-bit
    Ajit> transaction. 

  Yes, it would be nice if the bridge merged adjacent 32-bit transfers.
  I have yet to see any north bridges actually do this.
  
  A pair of Micron Samurai North Bridges will actually wind up splitting
a 64-bit transaction on one PCI secondary and split into two 32-bit transfers
when going to the other 64-bit secondary...

    Ajit> If yes, then I have come across one difficulty.
    Ajit> If the Initiator on the primary side has sent an odd number of
    Ajit> Double words then my idea of merging the two 32-bits of data to one
    Ajit> single 64-bit could result in merging the last odd 32-bit of data with a
    Ajit> null or stale data. 

    Ajit> Can someone suggest me a solution for this situation?

  Don't merge anything until you see two adjacent words actually going out
the bus.

  Speaking of 64-bit/66Mhz PCI... is there anyone out there that is
successfully using a Lucent Microelectronics OR3TP12 in a 66Mhz, 3.3v slot?

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