RE: How to achieve a long burst?

[Lame Brooks-G14738 <brooks.lame@motorola.com>]

> People beleive that the host does not like to use long
> bursts. It normaly separates a long burst into many short bursts. Is
> this true? Why?

Because sadly, the PCI host bridge in _most_ PC chipsets is a relatively
'dumb' data transfer state machine.  It can't do burst writes because it
doesn't have the facilities for the host processor to set up an outgoing
buffer and tell it to initiate the burst write.   It can't do burst reads
because it doesn't have a look-up table or window to indicate a prefetchable
address range (except for the AGP bus).  
	I suppose also that the demand for such utility is not there to
support it as a basic feature - using it would make software more complex
and require smarter, more expensive software developers.  It's an easier and
more attractive solution to sell and buy 64bit and PCI-X upgrades.
Inefficiency and inadequacy is the boon of consumerism!  People wouldn't
need to buy new model stuff if we made the original model do everything
really well!   -- BrooksL

> -----Original Message-----
> From: Henry Gong [mailto:henry.gong@radiata.com]
> Sent: Wednesday, 13 December, 2000 20:40
> To: pci-sig@znyx.com
> Subject: How to achieve a long burst?
> 
> 
> 
> Dear all,
> 
> 
> There is a popular view that if you want a long burst, you 
> have to be a
> bus master.  It sounds reasonable but nobody can tell me why. Can
> anybody explain please?
> 
> If the PC has a large block of data to send to the PCI card, here is
> what an experienced PCI engineer likes to do:
>     1. The host sends a message to the PCI card informing the starting
> address;
>     2. The PCI card starts a "Mater Read".
> 
> In this way, the transfeer is done in two steps. This is certainly not
> efficient for short bursts. It is supposed to be good for long burst.
> But why cannot the host simply start a master write. Then the PCI card
> responds in "Slave Read"? People beleive that the host does 
> not like to
> use long
> bursts. It normaly separates a long burst into many short bursts. Is
> this true? Why?
> 
> If the host sends a block of data to a PCI card, how long 
> burst in data
> can it
> normally achieve, 20, 200 or 2000?
> 
> If a PCI card sends a block of data to the host, how long 
> burst in data
> can it
> normally achieve, 20, 200 or 2000?
> 
> How can device driver control the burst? For example, why do 
> people say
> 3D graphic normally uses many short bursts?
> 
> Sorry to ask so many questions. Any explanation and comment, 
> even blame,
> is appreciated.
>