Re: How to achieve a long burst?

[Ted Firlit <firlit@utmc.aeroflex.com>]

Henry,

Something that wasn't brought up yet is the difference between burst
reads/writes and DMA accesses.  In my limited understanding of PCI, the
burst transfer has a limit of # of words of reads/writes depending on
the lowest of 1) host PCI controller capability and 2) the peripheral
PCI chip capability (8 32-bit words max in the peripheral PCI chip I'm
using).

Placing these burst rds/wrs as back-to-back as possible then allows the
most efficient large block transfers.  Direct Memory Access (DMA) is the
most efficient way to manage these transfers:  Software writes 1) data
source addr  2) data dest addr 3) number of bytes to a DMA controller
(implemented in hardware) and then writes a "start" command.  The
hardware then takes care of the entire transfer, and the software can go
do other tasks.

Unfortunately, it appears that the bridge chips on PC motherboards do
not implement DMA engines.  Therefore it falls to the peripherals to
implement DMA.. which also mandates they must be capable of becoming the
PCI bus master. 

regards,

Ted Firlit


Peter Marek wrote:
> 
> Henry,
> 
> The reason that you don't get any long bursts from PCI hosts is the fact
> that these host CPUs do usually not burts in their host processor bus when
> they access non-cahceable memory. Since PCI is a peripheral bus, PCI is not
> cached. I.e. since the northbridge does not see any bursts on the processor
> bus targetting PCI memory, the bridge is not able to do any bursts on PCI.
> This is at least true for reads from PCI. Regarding writes, the northbridges
> usually contain Posted write buffers. if consecutive memory addresses are
> written to PCi, these are stored in the posted write buffer, first. When the
> northbridge has obtained PCI bus ownership, it will then write the data to
> the PCI target. usually, northbridges are intelligent enough, to convert
> consecutive addresses in the posted write buffer to a write burst cycle on
> PCI.
> That's why you may observe short write bursts (some tens of DWORDs) on PCI.
> 
> So, if you want to make long bursts, you need to take care of it yourself,
> i.e. implement a bus master device.
> 
> regards,
> 
> Peter Marek
> General Director
> MarekMicro GmbH
> Kropfersrichter Str. 6-8
> D-92237 Sulzbach-Rosenberg
> Germany
> Phone: 049 - 9661 - 908 - 210
> Fax:      049 - 9661 - 908 - 100
> ----- Original Message -----
> From: Henry Gong <henry.gong@radiata.com>
> To: <pci-sig@znyx.com>
> Sent: Thursday, December 14, 2000 5:40 AM
> Subject: How to achieve a long burst?
> 
> >
> > Dear all,
> >
> >
> > There is a popular view that if you want a long burst, you have to be a
> > bus master.  It sounds reasonable but nobody can tell me why. Can
> > anybody explain please?
> >
> > If the PC has a large block of data to send to the PCI card, here is
> > what an experienced PCI engineer likes to do:
> >     1. The host sends a message to the PCI card informing the starting
> > address;
> >     2. The PCI card starts a "Mater Read".
> >
> > In this way, the transfeer is done in two steps. This is certainly not
> > efficient for short bursts. It is supposed to be good for long burst.
> > But why cannot the host simply start a master write. Then the PCI card
> > responds in "Slave Read"? People beleive that the host does not like to
> > use long
> > bursts. It normaly separates a long burst into many short bursts. Is
> > this true? Why?
> >
> > If the host sends a block of data to a PCI card, how long burst in data
> > can it
> > normally achieve, 20, 200 or 2000?
> >
> > If a PCI card sends a block of data to the host, how long burst in data
> > can it
> > normally achieve, 20, 200 or 2000?
> >
> > How can device driver control the burst? For example, why do people say
> > 3D graphic normally uses many short bursts?
> >
> > Sorry to ask so many questions. Any explanation and comment, even blame,
> > is appreciated.

-- 
Ted Firlit		      		(719) 594-8138
Senior Design Engineer
UTMC Microelectronics Systems
4350 Centennial Blvd., MS 1004
Colorado Springs, CO 80907