4. Direction bit: PCI --> Board or Board -->
PCI;
5. Go bit: if it is set, Master starts doing the designated job;
6. Status bits;
7. Other Board-dependent feathers;
To make these registers accessable to system software, one should allocate
space for the registers through BARx in PCI configuration space.
After above hardware design, software can get the registers' memory address
and size, then write commands to them, the final word to write is Go bit. After
Go bit is set, Master will start designated operation and return status or
interrupt if it finishes the job or any errors happen.
Weng Tianxiang
Micro Memory Inc.
9540
Vassar Av.
Chatsworth, CA 91311
Phone: 818-998-0070, Fax:
818-998-4459
----- Original Message -----
Sent: Saturday, October 14, 2000 8:48
AM
Subject: DMA across PCI
Hello,
I looked in the index of the PCI spec 2.1 and the
index of "PCI System Architecture", by Mindshare, Inc. Niether had a reference
to DMA.
I am guessing that there is no such thing as DMA
in the PCI world. Is that the case ?
I further guess that the closest thing to DMA is
a Master read or a Master write cylce.
Please enlighten me.
Sincerely
Daniel DeConinck
High Res
Technologies, Inc.
- References:
- DMA across PCI
- From: "Daniel DeConinck" <daniel.deconinck@sympatico.ca>