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21154 Bridge SCLK Power-up Errata



The 21154 from DEC/Intel has a power-up errata on the secondary clocks 
(Errata 6). Basically the designer botched the power-up reset circuitry in 
such a way that the device could end up locked in reset and never function.

The fix that Intel recommends is just short of hideous.

Has anybody actually found that this part will not power-up correctly and 
that the errata is real?

Any other ways to get around this errata (if it really happens)?

Mike Dini
The DINI Group