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RE: 21154 Bridge SCLK Power-up Errata



I've not seen the 21154 error, but I just finished changing a CompactPCI 
Hot Swap product to avoid it.   I have seen somewhat related problems in 
a 21554 design so I'm taking it seriously.  

I didn't like Intel's suggestion to temporarily switch the primary PCI 
clock (or other clock) into S_CLK. I added a pull-up on S_CLK and then put 
a FET switch in series with the source (S_CLK_O9 in my design).  I had 
some spare programmable logic that is now used to toggle the switch a 
couple of times before the local reset is released.  

Send me a reminder in mid January and I'll share my prototype test 
results.

Bob Shepard
Senior Staff Engineer
Monterey Design Center
Motorola Computer Group
12 Upper Ragsdale Drive
Monterey, CA  93940
  Bob.Shepard@Motorola.com


-----Original Message-----
From: Mike Dini [mailto:mdini@dinigroup.com]
Sent: Wednesday, December 27, 2000 5:00 PM
To: pci-sig@znyx.com
Subject: 21154 Bridge SCLK Power-up Errata


The 21154 from DEC/Intel has a power-up errata on the secondary clocks 
(Errata 6). Basically the designer botched the power-up reset circuitry in 
such a way that the device could end up locked in reset and never function.

The fix that Intel recommends is just short of hideous.

Has anybody actually found that this part will not power-up correctly and 
that the errata is real?

Any other ways to get around this errata (if it really happens)?

Mike Dini
The DINI Group