air-gap for esd fingers of compact PCI boards

[Ted Firlit <firlit@utmc.aeroflex.com>]

Hello,

In the Compact PCI spec, PICMG 2.0, paragraph 4.1.4 discusses the
concern of breakdown voltages of the resistors between board ground and
the ESD strips.  But, the spec does not appear to address the concern of
a minimum air gap between the resistor pads and nearby circuitry.

To make matters worse, the spec requires ESD strip #1 to have an edge
within 1.5 mm (.059 inch) of the first row of J1 pins.  (to the center
of the pin, so we still need to subtract 1/2 of the pad diameter!)

Can anyone tell me how much clearance to leave from these strips to
adjacent components to be safe for a typical level of ESD?  I had been
considering 2500V *.00012 V/in (per MIL-STD-275E) which is .300 inch,
but maybe (hopefully) I'm way off.

thanks,

Ted Firlit

-- 
Ted Firlit		      		(719) 594-8138
Senior Design Engineer
UTMC Microelectronics Systems
4350 Centennial Blvd., MS 1004
Colorado Springs, CO 80907