> The delay in this path is
> clock-to-Q of flop ( 0.6),> Buffer delay (0.6ns),> the PCI-X I/O pad delay ( 2.3ns )Is it a worst case timing ?What is a typical delay of above path ?Which Library you are using ?> and a clock insertion delay (0.5ns ).Is it insertion delay + skew ? If so, then thats pretty much good delay.Regards,Ajit