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RE: PCI Bus Layout Question
> 1) What value of controlled impedance should the board use for the PCI
> Is this a factor of bus length and speed?
The choice of motherboard impedance is up to the motherboard's designer. A
good thing for you to do is to get electrical (Spice?) models, try it out,
and see what impedance range works best for you. It may depend on your
driver ICs and the bus topology.
> 2) How do you handle terminating the PCI Clock signal on the motherboard
> (not on PCI cards)?
You could use either parallel terminations (say, an R-C at each PCI IC), or
series (source) terminations at the clock driver. When you have PCI cards,
you have to rely on the latter, and for consistency and low clock skew, it's
probably best to do that all the way around; but with no PCI add-in cards,
you can do either.
> 3) Any other layout issues that I should be aware of? (i.e., diode
> terminations, etc).
Each PCI IC has some amount of diode termination built-in, at least in the
negative direction. Try to make sure your Spice models correctly include
it. I have seen models that leave it out entirely, and several that poorly
model the clamp characteristics. All diodes have some internal resistance,
but many Spice models don't include any.
External diode terminations can be used on motherboards (not on PCI cards),
and may be useful to help control overshoots and ringing, especially with
longer buses or if the driver ICs are towards the "hot" end.
Avoid routing traces over splits or voids in the power/ground planes. Do
the usual good stuff.